Cybersecurity Breakfast - Spotlight on Valence Researchers

Join us for an exclusive edition of "The Cybersecurity Breakfast Series" as we shine a spotlight on researchers from Valence.

This event will feature the combined work of Ihab Alshaer (Postdoc at LCIS)  and Sébastien Michelland (PhD Student at LCIS), focusing on "Fault Security for Embedded Systems: Realistic Models and Compiler Support"

Presentation Summary

"Among the threats to embedded systems, physical attacks pose a significant risk, with fault injection attacks being especially powerful. An accurate understanding of the impacts of fault injection is needed to propose protections that are sufficiently secure but not excessive in their performance/cost ratio. Thus, building realistic fault models is the first key step in addressing vulnerabilities. Ihab will first showcase such realistic models at different levels of system abstraction. These models were able to explain the majority of observed faulty behaviors in physical fault injection campaigns on Arm Cortex-M and RISC-V processors.

A consequence of using realistic fault models is that potential countermeasures have to account for more low-level details higher up the abstraction ladder, which is challenging for two reasons. First, higher-level languages cannot usually express these details, so pinning down what security properties are at the source level is more difficult. Additionally, code protected at the source level or during compilation is liable to being broken by compilation tools, which do not account for security. Sébastien will show how to reason around these problems and implement a software/hardware countermeasure to one of Ihab's faults."